FEIT Research Project Database

FPGA and GPGPU implementations of signal processing algorithms

Project Leader: Jonathan Manton
Collaborators: Professor Philip Leong (University of Sydney)
Primary Contact: Jonathan Manton (jmanton@unimelb.edu.au)
Keywords: signal processing
Disciplines: Electrical & Electronic Engineering
Research Centre: Nonlinear Signal Processing Lab

Each time technology changes, signal processing problems can be revisited to see if the new technology enables better solutions. The current trend is towards FPGA-based and GPGPU-based parallel computing. This project aims to implement core signal processing algorithms on these technologies.